tag:blogger.com,1999:blog-5576006909517892141.post6633701698440923194..comments2018-01-02T07:51:21.460-06:00Comments on Co-simulation with synthesis: Fat, fat tracesAnonymoushttp://www.blogger.com/profile/01945439883277592912noreply@blogger.comBlogger3125tag:blogger.com,1999:blog-5576006909517892141.post-39764932489728101282014-08-15T14:32:06.655-05:002014-08-15T14:32:06.655-05:00Thanks for the clarification. I was wondering if I...Thanks for the clarification. I was wondering if I was missing something.Anonymoushttps://www.blogger.com/profile/14764416763681632596noreply@blogger.comtag:blogger.com,1999:blog-5576006909517892141.post-49482810494989626532014-08-15T13:08:22.692-05:002014-08-15T13:08:22.692-05:00With the thick traces, I set the traces to get an ...With the thick traces, I set the traces to get an impedance of 50 Ohms (given PCB-Pool's 6 layer stackup). I expect that to match the FPGA and memory's drivers.<br /><br />Using the same stackup and smaller traces (4-5mils), the impedance of the traces will be closer to 80 Ohms. So I'm looking at using the series resistor to compensate for a 50 vs 80 Ohm mismatch.Anonymoushttps://www.blogger.com/profile/01945439883277592912noreply@blogger.comtag:blogger.com,1999:blog-5576006909517892141.post-75440450077413870042014-08-15T11:11:29.322-05:002014-08-15T11:11:29.322-05:00In this context, what is a mismatch between the d...In this context, what is a mismatch between the driver and the transmission line? Specifically for impedance?Anonymoushttps://www.blogger.com/profile/14764416763681632596noreply@blogger.com