Assembly almost complete

I loaded most of the remaining components today including all decoupling & bulk caps, the switching power supplies, and all four LDOs.

  Power-on tests proved that all voltage rails are correct.  After bypassing the USB/CPLD programming circuit I was able to detect the FPGA using Quartus via JTAG!  That means the board is working perfectly (so far).

Next I'm going to try to bring up the USB/CPLD programming logic.  Two interesting projects exist online: OpenJTAG and the ixo.de USB JTAG pod project.  ixo.de's usb_jtag project looks like the simplest path.  I will most likely start there and see if it works.  

BGA installed

The BGA is populated!

It looks like my friendly assembly house did a good job installing the Cyclone V FPGA.  I'm going to take a few impedance measurements next.  If they look good I'll start loading more components next week.

PCBs arrive

It's finally here!

Today I received a prototype PCB of a simple Altera Cyclone V GX PCIe design.  The edge connector on the right is based on Arrow's BeMicro designs.  I was able to build three PCBs for about 70 dollars at OSH Park. It was tough to meet OSH Park's 6mil trace width/spacing requirements on a 484 pin BGA but so far everything looks good.

I dropped a PCB and a single FPGA at a local assembly house to have it installed.  If all goes well I'll install the remaining parts over the next few days and start bringing the card up.