Here's a picture of the logo (because I think it's cool):
Tuesday, June 17, 2014
Panel Assembly
I just posted a new video where I assembled my first prototype panel from PCB-Pool. Check it out on the CES blog: http://customembeddedsolutions.blogspot.com/2014/06/in-todays-video-john-builds-small.html
Here's a picture of the logo (because I think it's cool):
Here's a picture of the logo (because I think it's cool):
Tuesday, June 10, 2014
A new video about tools
I just posted my latest video on the CES blog. In this post I talk a bit about FPGA tool chains.
Monday, June 9, 2014
PCB-Pool Panel
I received my first mini-panel from PCB-Pool today. At first glance it looks really good. The biggest surprise was that I got two stencils when I only expected one. There must be a mistake for the edge connector on the paste paste layer (they shouldn't be pasted), but that mistake means that I now know that you can get two stencils just by including the bottom paste layer!
Figure 1. Nice Box! |
Figure 2. PCB Panel and Two Stencils! |
Figure 3. Panel Close-Up |
Saturday, June 7, 2014
Tag-Connect
I got my test cable and clip from Tag-Connect today. I've been looking for something like this for quite a while. Tag-Connect cables require a very small footprint pad and no connector on a PCB. This is perfect for a test connection that is only used in development (like JTAG for an FPGA). I placed a footprint for the 6 pin TC2030-IDC-NL on the CPLD design that I expect to early next week. I used the NL (no legs) version to get as small a footprint as possible. This meant that I needed a special clip to hold the cable to my PCB (see Figure 2).
Figure1. 6 Pin Tag-Connect Cable, Clip, and Example PCB. |
Figure 2. Tag-Connect Cable Held in Place on the PCB with a Clip. |
Wednesday, June 4, 2014
Memory woes
I've been getting up to speed on the Lattice Diamond development environment and targeting ECP3 FPGAs and I keep running across a cryptic "Done: error code 9" code when I try to synthesize my design.
Figure 1. Diamond error code reported during synthesis. |
I searched around a bit and couldn't find a definition of the error code. I finally realized that the problem was related to memory usage on the PC running Diamond. I have Diamond installed on a lab PC and on a t1.micro instance in Amazon's cloud. The lab PC has been fine but the cloud instance gave the code 9 error intermittently during synthesis or mapping. I finally ran top on the command line and noticed just how low the instance's free memory was getting (less than 8MB).
I guess that I'll have to chalk this one up to me being too aggressive. I'll know better than to run Diamond on a t1.micro instance with 0.615 GB of RAM when Diamond requires 4GB for small ECP3s on a 64bit Linux box:
Figure 2. Linux memory requirements for Diamond 3.1 (from the Diamond Linux installation guide). |
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