Titan is curing

I love PCB-Pool. They send pictures of your PCB during the assembly process (including the two latest pictures below). We will have the boards in our hot little hands early next week.

Figure 1. Top View of Titan

Figure 2. Bottom View of Titan

Titan is public!

I just finished posting rev A of Titan to http://github.com/c-e-s/titan. The rev A release may be found at http://github.com/c-e-s/titan/releases. I will write a longer post for the CES blog explaining the organization of the project. Look for the post in the next few days!

First open source PCB commit

I just posted Enceladus to the CES github account: https://github.com/c-e-s/enceladus.

Enceladus is the 0.1" header break-out board for the expansion headers used on Titan. I ordered this board awhile back. Since it was so simple Enceladus was the perfect board to practice a release. Let me know if anything looks odd since I expect to post rev A of Titan in a few days!

Oh, the lights!

My heart grows three sizes every time I see an FPGA make LEDs blink! This simple project has been checked into CES's github account: https://github.com/c-e-s/ecp5dev_wiggle

I will create new repos under the c-e-s organization as I practice building simple projects using Diamond 3.2 for the Lattice ECP5 PCI Express board.

DDR3 initial route complete!

I finished routing and tuning the DDR3 circuit last night. My branch of the Titan PCB layout is now in Kevin's hands for re-integration into trunk. I'll post some screen caps of the layout when the integration is complete. My next task will be to build a test project for the Lattice's new ECP5 PCI Express Board. When I get it working I'll port the code to Titan and validate our pinout.

Until then, enjoy our latest post at the CES blog: Lattice's ECP5 PCI Express Card