Friday, January 31, 2014

PCB design rule: solder mask expansion

Since I've been writing about PCB via size rules, I thought that I'd discuss another rule:  solder mask expansion.  Solder mask is a thin layer of polymer used to prevent solder bridges and is usually green [wikipedia].  OSH Park boards use purple solder mask.

Solder masks are applied to the entire surface of a PCB except where pads are located.  In a perfect world the solder mask opening would be the exact size of the pad.  In reality the solder mask application will be offset a bit from the pad.  With a pad-sized opening, solder masks offsets would cause some of the pad to be covered by the mask.  To prevent this PCB layout tools define a 'Solder Mask Expansion' Rule which defines how much larger the opening should be than a pad.

Since I couldn't find a solder mask expansion rule on OSH Park's website, I had to take a guess.  I used a 4 mil expansion rule on bityExpress-B and a 2 mil expansion rule on a other design.  Check out the pictures below for some examples of how the offset can vary.  Based on this limited sample set it looks like a 2 mil expansion rule might be right for OSH Park.  I'll keep tracking the accuracy of the mask on my next few orders and see if this holds.

0.8mm BGA pads, 2 mil solder mask expansion, board #1

0.8mm BGA pads, 2 mil solder mask expansion, board #2

0.8mm BGA pads, 2 mil solder mask expansion, board #3

1.0mm BGA pads, 4 mil solder mask expansion, board #1

1.0mm BGA pads, 4 mil solder mask expansion, board #2

Wednesday, January 29, 2014

New toy

Based on Dave Jones' (from EEVblogCheap USB Microscope Review I decided to purchase the Andonstar USB microscope that he reviewed.  It worked well in Linux using cheese with no driver installation:
Fancy, eh?

Vias on bityExpress-A

'Same' vias on bityExpress-B

Tuesday, January 28, 2014

Not one direction, a new direction

I decided to change up bityExpress a bit given what I've learned on the last few board builds.   The upgrades include:
  • The entire design is now single-sided SMT.  This should be much easier to paste and assemble myself.  I'll only need to order one stencil, and I won't have to worry reflowing the board twice or deal with back-side components preventing the board from being level while I paste the top-side.  There may be a SI (signal integrity) price to be paid for moving the decoupling capacitors a little farther away from the FPGA's power pins, but this layout still exceeds Altera's guidelines. I'd also like to start testing my SI rules-of-thumb.
  • I've removed the JTAG programmer and switching power supplies that I've already validated.  They really only added cost and assembly time at this point.  I'll consider re-adding them if I ever decide to build the board in larger volumes.
  • The board is now much more rectangular than it was.  This should make it fit better inside OSH Stencil's jigs;  Pasting should be easier and faster.

3D model of bityExpress-C
I ordered the updated card from OSH Park today and was assigned to today's panel!

Saturday, January 25, 2014


I heard back from OSH Park about these boards.  They said that it looks like the fab house made a mistake on my PCBs and they are refunding my order (for bityExpress-B boards).  They also confirmed that my via size was valid and it should have worked.  That's great news and gives me more confidence in OSH Park as a good place to get low cost four layer PCBs.

I decided against re-ordering rev B.  Even though my PCB met specs, I'm going to look at some risk mitigation ideas and move on to rev C.

Wednesday, January 22, 2014

Maybe it wasn't me

I started inspecting my two remaining bityExpress-B PCBs and found something disturbing.

Before I built the rev B PCB I noticed that OSH Park had reduced their minimum drill size from 13mils to 10mils and their minimum annular ring size from 7mils to 4mils.  I dropped the size of all of my vias on bityExpress to the smaller size (18mil total via size vs 27mils).  At this smaller size I can start considering more interesting additions to the card for later revisions.

I never really thought twice about it until I started inspecting the cards today.  Based on what happened on my first rev B build, I decided to check for continuity on all critical nets to the FPGA before loading the components and I found that TDI was open!  That means that my problem on the first card might not have been my soldering but with the board itself.  Looking at the PCB under the microscope showed that the annular rings are very thin around the vias.  It looks like the 10mil drills were actually drilled at something larger (13mils?).

A via from the gerbers.  The inner circle is the drill hole and the annular ring is the additional radius beyond the drill.

A via from the bityExpress-B PCB.  The drill is a much larger proportion of the total via diameter on the PCB

Double, Double Toil and Trouble

I dare say that when one's FPGA starts to foam at the mouth, things have gotten a bit out of hand.

It all started when I tested the bityExpress-B board from Sunday's build.  The on-board JTAG programmer was unable to identify the FPGA.  I tried Altera's JTAG debugger app and it turned out that the FPGA was reporting his device type to the programmer correctly, but no data from programmer was making it thru the FPGA.  This implied that the TCK, TMS, & TDO pins were all working correctly, but the TDI pin (data from the CPLD to the FPGA) was  not connected.  After I verified TDI was not shorted to anything nearby, I concluded that the BGA soldering must be the issue.

I tried reflowing the topside of the PCB again and ended up breaking the FPGA to programmer connection even more (no more device type response).  My last desperate measure was to dump a heck of a lot of flux under the BGA and reflow it one last time.  That's when things really went south.  I cleaned the board, powered it up, and started checking the power rails again.  After being on for a few minutes I noticed a frothy white substance coming from under the BGA.  It turns out that the flux I used was conductive and I did not fully clean the underside of the BGA:  Failure was catastrophic.

I spent some time reviewing my build process, footprint design, and solder paste stencil.  I've decided to build another backside myself and take the board back to local assembly house to load the FPGA.  This way I can validate the design.  If that works I'll try to build the third board myself and work on my process.

Sunday, January 19, 2014

The big one

I built the top side of my bityExpress-B board last night.  I had to stack some PCBs under my stencil frames to account for the components that I loaded previously on the back side of the board.  The paste worked well everywhere except U4 (the on-board programmer's CPLD).  Since I can bypass the programmer I went ahead and loaded the components and baked it.

All of the solder joints looked good except... you guessed it... U4.  It had at least 3 shorts.  I cleared those and tested.  So far the power supplies all work and I can program the CPLD and the FTDI FT245R.  I stopped when the on-board programmer failed to recognize the FPGA.  I'm betting that is related to solder issues on U4.  I'll try a bit longer to resolve U4's issues and if I fail I'll just bypass it and use an external programmer to check the FPGA.

Ready for paste
Paste looks good (except for U4)

Thursday, January 16, 2014

Another day, another stencil

I decided to try my hand at two-sided reflow before I run the BGA on bityExpress.  The board that I designed is a simple LED board that I can use to verify if all of the pins on the bityExpress expansion connector are connected to the FPGA correctly.

When I ordered the stencil I found OSH Stencils (no connection to OSH Park).  They make polyimide (Kapton) stencils like OHARARP, but they will build smaller stencils down to a minimum order of $5.  They also sell adjustable stencil frames for $5.  Based on what I see I'm sold.  Now I don't have to try to combine stencil orders to make them affordable.

Stencil and frame from OSH Stencil

Paste applied

Parts placed

Ready to reflow

Reflow complete


Wednesday, January 15, 2014

Backside build

I ran the backside of bityExpress-B using my toaster oven on Monday night.  I was planning on running the backside for all three PCBs and pick the best on to run again with the topside components, but I changed my mind when I saw how well the backside ran the first card.

Solder paste applied:

Parts placed:

After reflow:

Now I'm just waiting on my Altera Cyclone V FPGA to arrive before I build the topside.

Wednesday, January 8, 2014

Simple might be better

I was trying out a few additional manual profiles with my toaster tonight and surprisingly this one looks best:
  • Set the oven to its maximum setting and turn it on
  • After temperature has been above 220C for 30 seconds turn the oven off
  • 60 seconds after turning the oven off open the door
This profile isn't perfect, but it is really close:
  • Peak temperature: 227C
  • Time preheating (between Ts1 and Ts2): 135 seconds
    • spec:  60-120 seconds
  • Time above 219C (Ta): 96 seconds
    • spec: 60-120 seconds
  • Time from ambient to peak temperature: 8 minutes and 14 seconds
    • spec: 8 minutes

Looks like I have a profile.  My new paste should be arrive in a day or two.  Solder paste is supposed to be shipped overnight so that it arrives before the included cold pack warms too much.  I saved a few bucks counting on the polar vortex to keep my paste nice and cool.  Hopefully I won't regret that.

Tuesday, January 7, 2014


I couldn't resist getting a toaster oven today to see how hard it would be to profile.  I found a Black and Decker TO1675W at a local retailer.  The first order of business was to drop in a few thermocouple probes and see just how hot this oven can get:

With the oven set to 11 it reached 250C in around 12 minutes.  This is 15C beyond the typical maximum safe temperature for lead-free parts and certainly well beyond the liquidous temperature (219C) of most lead-free solders:

I then attempted a manually controlled profile.  I plan to automate my profile, but for now I'll just close the control loop myself to build a few boards.  I placed a bityExpress rev A card in the oven with a thermocouple placed near the center of the PCB:

My initial profile attempt was the following:

  • Set the oven to 180C and turn it on
  • After the temperature has been above 150C for 60 seconds, turn the oven up to its maximum temperature
  • After the temperature has been above 220C for 30 seconds, turn the oven off

Comparing this to Altera's SMT Board Assembly Process Recommendations (AN-353-4.0):

  • Time preheating (between Ts1 and Ts2): 143 seconds
    • spec:  60-120 seconds
  • Time above 219C (Ta): 102 seconds
    • spec: 60-120 seconds
  • Time from ambient to peak temperature: just over 8 minutes
    • spec: 8 minutes

Why did I ever trust the paste?

After looking again (and getting some advice), I've decided that the real problem was that the paste was too old.  When solder paste ages it looses flux due to its volatility.  When I heated the PCB last night it smoked much less than when I ran the bityBGA boards (a clue I missed).  Today's inspection settles it:

Monday, January 6, 2014

Oh, thermal mass

I used my rev B stencil to apply some paste to an extra rev A PCB to test my ability to solder bityExpress.  Unfortunately I had poor results.   I couldn't get the paste hot enough to flow evenly.

I'm not sure if the issue is with the larger thermal mass of this card or if I need to adjust the IR lens a bit more.  I was discouraged enough to look into toasters.